Prior art computer systems are typically designed based on worst-case scenarios. For example, if a processor is contemplated for single, dual, and multi-processor systems, the processor as well as other components are designed for the configuration having the slowest operating environment, which is typically determined by system bus frequency and topology. The slowest operating environment often corresponds to a multi-processor (e.g., more than two processors) configuration because of physical constraints such as bus length, bus load, etc. that are associated with coupling multiple processors and support circuits to a single bus.
However, smaller systems (e.g., single- and dual-processor computer systems) are often be capable of operating at higher system bus frequencies than multi-processor configurations. Because the multi-processor systems define the worst-case operating scenario, the smaller systems do not operate optimally unless components are redesigned to operate in the smaller system, which increases the cost of the smaller system. Because smaller systems are more numerous than multi-processor systems, most computer systems are designed with sub-optimal operating characteristics.
Bus systems are particularly susceptible to performance degradation in larger computer systems because buses are physically longer in systems having more components. Longer system buses result in lower operating frequencies because of transmission line considerations associated with the length and load of the bus. Therefore, the number of components coupled to a particular bus limits the operating frequency of the system bus and often acts as a bottleneck to system performance by defining the worst cast scenario for system topology.
What is needed are system components that may be compensated based on the specific system topology in which the components operate in order to improve performance of the system.